This invention relates, in general, to non-volatile semiconductor memory devices, and more particularly, to methods of programming a non-volatile memory cell.
Electrically programmable read only memories (EPROMs) are non-volatile memory devices that are programmed using electrical signals. Within an EPROM device are a plurality of memory cells, each of which may be individually programmed. In general, an EPROM cell includes a floating gate transistor which stores the digital value of each particular memory cell.
To program an EPROM memory cell, a phenomenon known as hot carrier injection (HCI) is commonly used. Using HCI, a negative charge is stored in the floating gate of each memory cell. For example, programming is accomplished by passing a current from a drain terminal to a source terminal of the floating gate transistor. The flow of current will pass electrons under the dielectric layer of the floating gate transistor. A positive voltage is then placed on the control gate of the memory cell so that electrons are directed towards and embedded into the floating gate where they become trapped. Once a sufficient amount of electrons are stored on the floating gate, the electrical state of the floating gate will be changed and the memory cell is considered to be programmed.
The design and operation of traditional EPROM devices are limited by the amount of current that can pass under the dielectric layer. This limits the rate at which electrons can be trapped in the floating gate. As a result, it is quite common for it to take up to 20 milliseconds to program each memory cell. When this time is multiplied by the number of memory cells in each EPROM device and then multiplied by the number of EPROM devices in each manufacturing lot, it is quite common for the programming sequence of all the memory cells in a manufacturing lot to exceed 10 hours. Since most manufacturing flows include a functional verification of each memory cell, the 10 hours necessary to program each memory cell significantly contributes to the total test time of EPROM devices, and thus contributes to the final manufacturing cost of EPROM devices.
By now it should be appreciated that it would be advantageous to provide a structure and a technique for reducing the programming time of a non-volatile memory cell. It would also be advantageous if the technique did not appreciably increase the processing complexity or manufacturing cost of the non-volatile memory array.